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Found 15 results

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Filters: Author is Rameshan, Navaneeth

2016

N. Rameshan, Liu, Y., Navarro, L., and Vlassov, V., “Augmenting Elasticity Controllers for Improved Accuracy (Best Paper Candidate)”, in 13th IEEE/USENIX International Conference on Autonomic Computing (ICAC), 2016.

N. Rameshan, Liu, Y., Navarro, L., and Vlassov, V., “Elastic Scaling: A Multi-Tenant Perspective (Invited Paper)”, in in 6th international workshop on Big Data and Cloud Performance (DCPerf), Co-located with ICDCS, 2016.

N. Rameshan, Liu, Y., Navarro, L., and Vlassov, V., “Hubbub-Scale: Towards Reliable Scaling under Multi-Tenancy”, in 16th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid), 2016.

N. Rameshan, Birke, R., Navarro, L., Vlassov, V., Urgaonkar, B., and Chen, L. Y., “Profiling Memory Vulnerability of Big-Data Applications”, in 46th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Industrial Track, 2016.

2015

Y. Liu, Rameshan, N., Monte, E., Navarro, L., and Vlassov, V., “ProRenaTa: Proactive and Reactive Tuning to Scale a Distributed Storage System”, in CCGrid 2015, 2015.

2014

L. Sharifi, Rameshan, N., Freitag, F., and Veiga, L., “Energy efficiency dilemma: p2p-cloud vs. mega-datacenter (Nominated for Best Paper Award)”, in CloudCom 2014, 2014.

N. Rameshan, Navarro, L., Monte, E., and Vlassov, V., “Stay-Away, protecting sensitive applications from performance interference”, in ACM/IFIP/USENIX Middleware 2014, 2014.

2013

N. Rameshan, Navarro, L., and Tsalouchidou, I., “A monitoring system for community-lab (Best Demo Award)”, in Proceedings of the 11th ACM international symposium on Mobility management and wireless access, 2013.

J. Simao, Rameshan, N., and Veiga, L., “Resource-Aware Scaling of Multi-threaded Java Applications in Multi-tenancy Scenarios”, in CloudCom 2013, 2013.

2012

N. Rameshan and Veiga, L., “RATS: Resource Aware Thread Scheduling for JVM level Clustering”. 2012.

2011

L. Suresh, Rameshan, N., Gaur, M. S., Zwolinski, M., and Laxmi, V., “Acceleration of functional validation using gpgpu”, in Electronic Design, Test and Application (DELTA), 2011 Sixth IEEE International Symposium on, 2011.

2010

L. Suresh, Rameshan, N., Narayan, A., Zwolinski, M., Gaur, M. S., Laxmi, V., and Singh, V., “EDA Design Flow Acceleration using GPGPUs”. 2010.

N. Rameshan, Laxmi, V., Gaur, M. S., and Ahmed, M., “Minimal path, Fault Tolerant, QoS aware Routing with node and link failure in 2-D Mesh NoC”, in Defect and Fault Tolerance in VLSI Systems (DFT), 2010 IEEE 25th International Symposium on, 2010.

2009

K. Kumar Paliwal, George, J. Shaji, Rameshan, N., Laxmi, V., Gaur, M. S., Janyani, V., and Narasimhan, R., “Implementation of QOS aware Q-routing algorithm for network-on-chip”, in Contemporary Computing, Springer, 2009, pp. 370–380.

N. Rameshan, Biyani, A., Gaur, M. S., Laxmi, V., and Ahmed, M., “Qos aware minimally adaptive XY routing for NoC”, 17th International Conference on Advanced Computing and Communication (ADCOM), Bangalore, India, 2009.